FT x86 Processor Recreation Datasheet

FT x86 Processor Recreation Datasheet

Replacement for the Intel/AMD
80186/286/386/486 Processor

General Description

Daughter board with 68 pin PLCC adaptor - top

Example daughter board with 68 pin PLCC adaptor - bottom
Example daughter board with 68 pin PLCC adaptor

The Intel x86 processor family and its equivalents from manufacturers such as AMD and NEC, were among the most popular and critical components used by electronic designers for over two decades. However the obsolescence of the x86 processor series has, until now, created a major problem for the design engineer tasked with guaranteeing continuity of supply in long life systems.

This custom IP core, which is developed for each specific application, offers an elegant and cost-effective way of replicating the core functions of the original processor. Only the functions used by the intended target system are provided, making it viable to emulate in FPGA and thus avoiding the prohibitive cost of recreating the part in silicon.

FT Custom IP cores can replace similar parts such as Intel 80188/80186EB, Intel 80188/80186XL, NEC V53 and AMD AM188/186ES. Intel and AMD NMOS 80286, 80386, and 80486 and the later CMOS 80C186, 82086, 80386 and 80486 derivatives.

The IP Core can be targeted to any FPGA from leading vendors such as Altera, Xilinx, Actel and Lattice and has a broad set of integrated peripherals, which helps reduce system development time and cost. It is compatible with a wide range of compilers and debuggers. These include Memory and peripheral Bus interfaces, DMA controller (8237), multiple timers (8254), a programmable interrupt controller (8259), variable-rate asynchronous serial ports (8251), flexible chip select unit, and a peripheral control block.

Design process

  1. Study of relevant x86 processor datasheet/manual
  2. Run programs on x86 development board
  3. Capture bus waveforms and understand different bus cycles/timings and code execution
  4. Develop x86 compatible IP
  5. Write a testbench to verify the IP functionality
  6. Develop a 168-pin PGA FPGA adapter board
  7. Program the FPGA in adapter board with x86 IP
  8. Plug the adapter board to x86 development board PGA socket
  9. Run the BIOS program and test the functionality of the x86 IP

IP Architecture

IP architecture

  • 100% Compatible with relevant functions in Intel x86 processor
  • Paged, virtual memory management
  • Two pin system management interrupt
  • Dynamic bus sizing for 8, 16, 32-bit buses
  • Flexible write-through and write-back address control
  • Write back cache support
  • Instruction set compatible but not cycle-to-cycle accurate

FPGA Architecture

FPGA architechture

  • 168-pin PGA adapter
  • FPGA to implement relevant x86 IP
  • 3.3V IO support
  • Configuration FLASH for FPGA configuration
  • Power supply circuit to generate local power to FPGA
  • FPGA JTAG circuit
  • IP debug support using LA via debug connector

Options

Option 1) Binary and Socket Compatibility:

This option uses a daughter board to implement the FPGA and minimal associated logic as an exact pin-to-pin replacement for the original x86 Processor. This approach eliminates both software and hardware changes as everything is implemented on the plug in daughter board.

Option 2) Binary Compatibility and Higher Integration:

A soft implementation of the original x86 Processor (CPU core and integrated peripherals) is programmed onto an FPGA. High FPGA integration enables low BOM Cost and reduces board form factor. It supports integration and retargeting of the other external peripherals and components. This solution allows enhanced system performance with increased operating frequency and tighter integration.

Deliverables

Soft x86 IP Core (Options 1 & 2)

  • Verilog RTL
  • Verilog testbench
  • FPGA vendor specific project file
  • User manual
  • FPGA programming file

FPGA adapter board (Option 1)

  • Sample Boards for testing
  • Schematics in pdf format
  • Production Boards