DER Die Extraction and Reassembly (DER)

Component obsolescence is becoming an increasingly difficult aspect of managing production logistics and procurement, in many cases, due to component obsolescence, in the required device package configuration (e.g. DIP, SOIC, LCC, PQFP, etc.), or possibly even bare die cannot be located despite the correct silicon die revision which is readily available in an alternate package footprint(s). We now have a recognised and proven solution to harvesting/decapping die and re-packaging into the correct package…… DER

Franchised/OEM/FT Tested donor options available.

Die Recovery/extraction/decapping

Force Technologies through its Strategic Service Partnerships are now able to offer a reliable, cost-effective, high-volume die recovery or de-capping technology.. To remove silicon die from any package and re-assemble into any other plastic and or Hermetic Ceramic JEDEC, metal can or custom package. This technology provides many potential solutions targeting the need for part re-creation and microcircuit re-fabrication, both current topics pertinent to resolving DMS issues.The die extraction/decapping process is proven to be a reliable and cost effective solution to DMSMS issues.

We offer FT options of donor parts with or without OEM CofC . 

Die Reassembly

Once the die has been successfully harvested, the original gold wires are mechanically removed just above the original gold ball bond, providing a clean, uncontaminated gold surface for high adhesion re-bonding.

The only subsequent non-standard assembly process is that a new gold ball bond is made to the existing gold ball bond surface, rather than to the original aluminium pad interface. Under proper process optimisation, the new gold bond on the existing gold ball bond adheres as the original device. We also offer high temperature reliability by using Ni/Pd/Au pad replating Performance to 250oC.

Die Pre Testing or Post Assembly

This statement can be supported with pre and post die extraction/reassembly bond pull data which is not only indistinguishable in both cases, but also generally limited to the tensile strength of the bond wire used. Additional test data referencing die shear and bond shear is also statistically identical for pre and post extraction/reassembly processing. Lastly, the extraction and re-assembly processing can be shown to have the added benefit of providing inspected, genuine silicon for subsequent re-assembly, while significantly reducing the possibility of inadvertent use of counterfeit devices in military systems.

For the higher temperature applications included deep well logging we have taken side-by-side accelerated life test empirical data at 250°C using the same silicon dice packaged in plastic ICs vs. packaged in ceramic ICs.  The ceramic ICs contained dice that were removed from the same lot as the plastic ICs that were selected using a random sample.  With every pin periodically tested for continuity at periodic read points after baking in an oven at 250°C, the results showed the plastic packaged die began to fail showing “opens” after only 81 hours at 250°C (which is equivalent to 350 hours at 185°C) while the same die reassembled into ceramic packages began to show “opens” only after more than 1000 hours at 250°C (which is equivalent to 16,000 hours at 185°C). This data clearly demonstrates that the lifetime of the repackaged ceramic ICs was increased by more than 10X over the lifetimes of the plastic ICs at high temperatures.

Subsequent tests include DC and parametric testing to SCD, data sheet or customers drawing. Performed in DESC approved test facilities to MIL-STD 883(K) conditions. Characterisation and reliability life testing also available.  Force Technologies will also undertake F/A processes.

Devices are always supported and marked with the Force Technologies PN/QMXXXX number, relating to the processes used to define the unique ordering code.

Many MCM manufactures can now use harvested devices from COTS to prepare prototypes before committing to wafer quantities. Force Technologies have capacity to extract over 15,000 devices/month.

Harvested die placed in Gel-Pak Vacuum Release™ solutions can be stored in Force Technologies international locations under controlled environments ready for assembly and test when needed by the end user.

Re-Working (Mechanical)

Force Technologies offers a number of standard and custom mechanical re-working services, to existing or damaged components.

Re-working or modifying components to meet the original or specific, new mechanical specification is a cost-effective way of managing the availability of obsolete semiconductors and electronic components, such as microprocessors, Linear, Memory, discrete devices for clients in aerospace, space and military sectors. Force Technologies has managed ball-attach and de-balling and re-balling services. Using Laser or Sigma6 techniques.

We provide options for conversion of solder spheres between lead-free and tin-lead (Sn63Pb37 or Sn10Pb90) and customer returned products can be re-balled in readiness for use in existing products.

Clients can choose high or low production volumes and automated lines manage the de-ball/sphere placement/reflow process.

Component lead alignment for semiconductor packages such as Quad Flat Package (QFP), Dual In-line Package (DIL) and Small Outline Integrated Circuit (SOIC)  is performed under a controlled environment and reworked to standards suitable for machine placement.

We perform qualification testing that measures acoustic microscopy, ionic cleanliness and ball shear.

Force Technologies Ltd. operates to RoHS (Restriction of Hazardous Substances) compliant working practices and applications which include:

Force Technologies Ltd. can, where appropriate, offer taping & reeling services. All batches are taped to EIA standards and are tested for peel strength. We have a vast capacity for producing tape & reel according to your specific requirements.

High quality materials ensure a strong pocket formation and our in-house YAG laser engraving ensures clear identification and quality control.

Custom Design as an obsolete IC replacement?

In addition to our wide range of standard electronic components, semiconductors and integrated circuits, Force Technologies Ltd. offers custom design and manufacture to meet the specific requirements of clients in the commercial, industrial, military, aerospace and space sectors.

Typical process Flow for new designs

  1. Netlist extraction using Scanning Electron Microscope. Photographing each layer of the device.
  2. Merging of images converted into GDS database.
  3. Database processing to extract a Spice Netlist and Verilog netlist.
  4. Measurement of devices to assist in calibration of any Analog component device sizes.
  5. Write simulations to exercise the part and try the simulations on an actual part using our tester.
  6. Once we have the netlist, the design work splits into digital and Analog portions. The digital portion continues to write simulations and run them on the netlist.
  7. Simulation results will be used to exercise the part on the tester.
  8. Any Analog portion will consist of running Spice on the main Analog components (transmit codec, receive codec, microphone input and audio drivers).
  9. Use the Spice to verify correct operation over the process, temperature, and voltage ranges. We will also check for the stability of any op amps.
  10. Satisfied with any Analog design, we will begin the layout of the Analog portions. We will follow a similar floorplan to the existing part.
  11. The digital portions will be implemented using a gate array architecture.
  12. When the layout is complete, we will run the DRL and LVS tests along with post route simulations.
  13. When completed the design will tape out.


  1. In parallel with the design activities, we will start working on the test program and the test hardware. Any Codecs are notoriously hard to test. We will build a load board that contains any DACs and ADCs. Using simultaneous tones to stimulate the codec, and run a FFT on the output to analyse the results. Simultaneous tones can quickly measure the code bandwidths and filter roll-offs. It also is a good way to measure for intermodulation distortion and noise floor.


  1. The prototype cycle begins when we tape out. The data base is evaluated by the fab, and we are asked to approve the DRC results. Then the data base is sized and sent to the mask shop. The masks are made and returned to the fab, and the first lot of wafers is started. When completed, the wafers will be assembled by the subcontractor, and returned to Force for electrical test at the test house.
  2. We will conduct additional testing on these sample parts, including temperature testing and a detailed measurements of all data sheet parameters.
    Prototype shipment: Once we have completed and are satisfied the prototypes may be shipped so the customer may test and qualify them in their end product.
  3. Force does guarantee that the device will work in the customer application. If the prototypes need a revision we will need to understand and work with the customer to define the problem in order to make a revision and supply new prototypes for qualification. We have never had a project where we could not deliver working devices to a customer who was willing to work with us.

We have received commissions for many designs by reverse engineering “standard” OEM devices. From 6800 to VME parts unique to companies like: Motorola, Cypress, IDT and many, many others.

Manufacture options include the emulation by ASIC (Application Specific Integrated Circuits), modules, SoC (System on a Chip), and of FPGA (Field Programmable Gate Arrays), designing for fixed configuration manufacture with multiple program ability.

Overcome problems with procurement of packages, IC components and die. Continued availability of obsolete components can also be assured by back-engineering, design and manufacturing techniques.

Custom semiconductor design services also include options for: thick film circuits, monolithic parts and modules and ASIC Structured cell developments.

Let Force discuss with you the viability of your requirement and work together to see if an engineering solution to your obsolescence can be established.


Force Technologies offers the re-creation of EOL (end of life) or obsolete semiconductors and items that demand an extended life-cycle forecast; all to original manufacturer’s design specifications or equivalent such as Atmel, Xicor, Linear Tech, AMD/Spansion and many more.

QML (qualified manufacturing lines) or assembly to DSCC approved military specification MIL-PRF-38535 guarantee re-creation and replication of thousands of variants in semiconductor, Memories, Micro’s, Logic Analogue, Linear, Programmable Gate arrays, Modules, Interface circuits, Opto and Discrete devices.

Obsolescence of semiconductors is a challenge for businesses in the: aerospace, military, industrial and commercial sectors. You can rely on Force Technologies to maintain complete control throughout the design and manufacture of product re-creations, and benefit from our guaranteed FT branded replications.

  • FT replications are 100% guaranteed
  • In-design enhancements available
  • Re-manufacture in accordance with MIL-STD-883 standards
  • Re-creations meeting original data-sheet performance under SCD (Source Control Drawing) or customer specification.

When you need flexibility to accommodate your ever-changing requirements, or if the original manufacturers cannot deliver, Force Technologies has the re-creation resources to ensure continuity of supply that outlives original production output.

Force Technologies are constantly adding to our range of re-created products, including: all types of integrated circuits manufacturing an ever increasing range of standard “FT” products.

Assembly, packaging and test for the re-creation of obsoleted replacements

Force Technologies offers complete turnkey IC packaging services for custom, high-performance and high-reliability microelectronics. This includes a full range of design, manufacturing, and test services for a many applications. Our turnkey services are supported by our 33 years  of experience with a variety of IC assembly technologies including: die attach (solder, epoxy and eutectic), hermetic device packaging, Ball Grid Array (BGA), QFN, DFN, Chip Scale Package (CSP), and Ceramic leadless Chip Carrier (CLCC).

We help customers introduce new replecement products to market in the fastest time possible by providing high quality, quick-turn assembly. We support low and high volume production from our sub-contractor facilities.

Force Technologies Ltd. ensures continued support and quality of build for obsolete semiconductors, (microprocessors, Linear, memory, opto,analog  and discrete devices), through our access to a wide range of original manufacturers’ assembly, testing and custom package designs.

We use detailed information from original manufacturers and 33 years of experience in re-creation, assembly and testing, to supply high quality, reliable, replacements to obsolete components. SCD (Source Control Documents), created by Force Technologies or customers, or comprehensive data sheets give Parametric and Mechanical assurance.


Using our in-house capabilities and DESC approved partners we facilitate compliance to mechanical and environmental standards; all components are assembled, tested and packaged under MIL-STD conditions. Clients in commercial, industrial, aerospace, military and space sectors can rely on Force Technologies. All elements are fully evaluated and semiconductors are assembled within closely controlled processes, using Qualified Manufacturing Lines, (QML) or DESC approved assembly therefore giving 100% quality assurance.


A vast range of packaged die options are available from Force Technologies means continued support for diminished source or end of life components.  Bare die or wafer are lot qualified or can be probed over temperature and meet MIL-STD-883 standards. Die and wafers can be re-engineered and re-manufactured to original package designs or to cater for specific requirements lead-free or green standards.

  • Vast range of packaged die options
  • Accordance  with  MIL-STD-883 standards
  • Original or specific manufacture designs
  • Laser marked for Military, Space, Aerospace, Industrial
  • Large range of package configurations including custom types

NEW Chip & Wire solutions.

Miniturisation and low cost for low to medium volumes can now be achieved using Chip & Wire bonding direct onto various substrates.

Once the design / ball soldering operation is complete, it is then is processed  for all die and wire bonding using aluminium wedge, gold wedge or gold ball wire bonding depending on the technology required. Once wirebonded and tested, the assembly is then able to be encapsulated using dam & fill glob top technologies. Device types range from die having a single bond wire up to 750 wires / die and in some instances on COB devices up to 1000 wires / assembly. Furthermore when combined with our extensive SMT & test capability, Force can offer a total product solution. more

All devices are fully evaluated and semiconductors are assembled within closely controlled processes, using Qualified Manufacturing Lines, or approved assembly therefore giving 100% quality assurance by our contractors to ISO9001, ISO13485 and AS9100


Both in-house and contract partners’ test facilities, enables the use of an extensive list of testing methods and techniques to provide a comprehensive range of electrical, and environmental testing, for all types of semiconductors, (microprocessors, Linear, memory, discrete & opto devices). Clients can opt for original manufacturer-approved testing programs (where available) or tailored test programs to ensure quality assurance and form, fit and function.

Force facilitates the COMPLETE solution from concept to final production ic. Mitigating all processes in between. A 100% solution to obsolescence.